1. Technical Field
The invention relates generally to electronic fuse blow, and more particularly, to a method and system for mimicking an electronic fuse blow and adjusting the same.
2. Background Art
An electronic fuse is basically a poly silicon fuse link which is coupled to a voltage line (usually referred to as a FSource) on one end, and to the top of an n-channel field-effect transistor (NFET) on the other end. FIG. 1 shows a configuration of an electronic fuse 10 including a poly silicon fuse link 12 and an NFET 14. NFET 14 of fuse 10 is usually referred to as a blowFET 14. The gate of blowFET 14 is coupled to a gate voltage 24. During a fuse blow, a voltage is supplied by the FSource and NFET 14 is turned on by, inter alia, a gate voltage (Vdd or blow Vdd) 24, for a particular amount of time, which allows controlled electromigration to occur, which causes a salicide/boron pile-up on an anode side (not shown) of poly fuse link 12. The resistance across poly fuse link 12 may rise from hundreds of ohms to many Kilo-ohms.
As is known in the art, the fuse resistance rise during a fuse blow needs to meet a particular chip characteristic requirement. Using a “one size fits all” approach to a fuse blow will probably result in two undesirable results, i.e., ruptured fuse or weak fuse blow. As such, if chip characteristics vary, the fuse blow process may need to be altered to provide the desired fuse yield. That is, the environmental variables of a fuse blow process, e.g., blow Vdd 24, FSource voltage, or the fuse blow time, may need to be varied according to a different characteristic requirement of the chip. However, the current state of art technology provides no satisfactory solution to determine whether and how an environmental variable needs to be varied.
Based on the above, there is a need in the art for an invention that addresses, among others, the above described problems.